1N4007 Datasheet, PDF (4/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
www.ti.com
Table of Contents
1 Device Overview ......................................... 1
1.1 Features .............................................. 1
1.2 Applications........................................... 1
1.3 Description............................................ 1
1.4 Functional Block Diagram ............................ 3
2 Revision History ........................................ 5
3 Device Comparison ..................................... 6
3.1 Device Comparison................................... 6
3.2 Related Products ..................................... 7
4 Terminal Configuration and Functions.............. 8
4.1 Pin Diagram .......................................... 8
4.2 Terminal Functions.................................. 17
5 Specifications ........................................... 41
5.1 Absolute Maximum Ratings ......................... 41
5.2 ESD Ratings ........................................ 41
5.3 Recommended Operating Conditions............... 42
5.4 Power Consumption Summary...................... 42
5.5 Electrical Characteristics ............................ 43
5.6 Thermal Resistance Characteristics for [CZH/GZH]
Package ............................................. 43
5.7 Timing and Switching Characteristics ............... 44
6 Detailed Description ................................... 70
6.1 Recommended Clock and Control Signal Transition
Behavior ............................................. 70
6.2 Power Supplies ..................................... 70
6.3 Power Supply to Peripheral I/O Mapping ........... 71
6.4 Power Sleep Controller (PSC) ...................... 78
6.5 Reset Controller ..................................... 82
6.6 Main PLL and PLL Controller ....................... 86
6.7 DDR3 PLL.......................................... 100
6.8 Enhanced Direct Memory Access (EDMA3)
Controller........................................... 102
6.9 Interrupts ........................................... 106
6.10 Memory Protection Unit (MPU) .................... 125
6.11 DDR3 Memory Controller .......................... 140
6.12 I²C Peripheral ...................................... 141
6.13 PCIe Peripheral (C6654 Only) ..................... 143
6.14 Ethernet Media Access Controller (EMAC) (C6654
Only) ............................................... 144
6.15 Management Data Input/Output (MDIO) (C6654
Only) ............................................... 150
6.16 Timers.............................................. 151
6.17 Semaphore2 ....................................... 151
6.18 Multichannel Buffered Serial Port (McBSP)........ 152
6.19 Universal Parallel Port (uPP) ...................... 153
6.20 Emulation Features and Capability ................ 154
6.21 DSP Core Description ............................. 155
6.22 Memory Map Summary............................ 158
6.23 Boot Sequence .................................... 162
6.24 Boot Modes Supported and PLL Settings ......... 163
6.25 PLL Boot Configuration Settings................... 182
6.26 Second-Level Bootloaders......................... 182
7 C66x CorePac.......................................... 183
7.1 Memory Architecture ............................... 184
7.2 Memory Protection................................. 187
7.3 Bandwidth Management ........................... 188
7.4 Power-Down Control............................... 188
7.5 C66x CorePac Revision ........................... 189
7.6 C66x CorePac Register Descriptions.............. 189
8 Device Configuration................................. 190
8.1 Device Configuration at Device Reset ............. 190
8.2 Peripheral Selection After Device Reset........... 191
8.3 Device State Control Registers .................... 191
8.4 Pullup and Pulldown Resistors .................... 218
9 System Interconnect ................................. 219
9.1 Internal Buses and Switch Fabrics ................ 219
9.2 Switch Fabric Connections Matrix ................. 219
9.3 TeraNet Switch Fabric Connections ............... 222
9.4 Bus Priorities ....................................... 225
10 Device and Documentation Support.............. 227
10.1 Device Nomenclature .............................. 227
10.2 Tools and Software ................................ 228
10.3 Documentation Support............................ 229
10.4 Related Links ...................................... 230
10.5 Community Resources............................. 230
10.6 Trademarks ........................................ 230
10.7 Electrostatic Discharge Caution ................... 230
10.8 Glossary............................................ 230
11 Mechanical Packaging and Orderable
Information ............................................. 231
11.1 Packaging Information ............................. 231
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Table of Contents
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