1N4007 Datasheet, PDF (153/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

www.ti.com
TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
6.19 Universal Parallel Port (uPP)
The universal parallel port (uPP) peripheral is a multichannel, high-speed parallel interface with dedicated
data lines and minimal control signals. It is designed to interface cleanly with high-speed analog-to-digital
converters (ADCs) or digital-to-analog converters (DACs) with up to 16-bits of data width (per channel). It
may also be interconnected with field-programmable gate arrays (FPGAs) or other uPP devices to achieve
high-speed digital data transfer. It can operate in receive mode, transmit mode, or duplex mode, in which
its individual channels operate in opposite directions.
The uPP peripheral includes an internal DMA controller to maximize throughput and minimize CPU
overhead during high-speed data transmission. All uPP transactions use the internal DMA to provide data
to or retrieve data from the I/O channels. The DMA controller includes two DMA channels, which typically
service separate I/O channels. The uPP peripheral also supports data interleave mode, in which all DMA
resources service a single I/O channel. In this mode, only one I/O channel may be used.
The features of the uPP include:
• Programmable data width per channel (from 8 bits to 16 bits inclusive)
• Programmable data justification
– Right-justify with 0 extend
– Right-justify with sign extend
– Left-justify with 0 fill
• Supports multiplexing of interleaved data during SDR transmit
• Optional frame Start signal with programmable polarity
• Optional data ENABLE signal with programmable polarity
• Optional synchronization WAIT signal with programmable polarity
• Single Data Rate (SDR) or Double Data Rate (DDR, interleaved) interface
– Supports multiplexing of interleaved data during SDR transmit
– Supports demultiplexing and multiplexing of interleaved data during DDR transfers
For more information, see the Universal Parallel Port (uPP) for KeyStone Devices User's Guide.
Copyright © 2012–2016, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TMS320C6652 TMS320C6654
Detailed Description 153