1N4007 Datasheet, PDF (214/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
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8.3.20 Pin Control 0 (PIN_CONTROL_0) Register
The Pin Control 0 Register controls the pin muxing between GPIO[16:31] and TIMER / UART / SPI pins.
The Pin Control 0 Register is shown in Figure 8-19 and described in Table 8-21.
Figure 8-19. Pin Control 0 Register (PIN_CONTROL_0)
31
30
29
28
27
26
25
24
GPIO31_SPID GPIO30_SPIDI GPIO29_SPIC GPIO28_SPIC GPIO27_UART GPIO26_UART GPIO25_UART GPIO24_UART
OUT_MUX
N_MUX
S1_MUX
S0_MUX
RTS1_MUX CTS1_MUX
TX1_MUX
RX1_MUX
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
23
22
21
20
19
18
17
16
GPIO23_UART GPIO22_UART GPIO21_UART GPIO20_UART GPIO19_TIMO GPIO18_TIMO GPIO17_TIMI1 GPIO16_TIMI0
RTS0_MUX CTS0_MUX
TX0_MUX
RX0_MUX
1_MUX
0_MUX
_MUX
_MUX
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
15
0
Reserved
R-0
Legend: R = Read only; RW = Read/Write; -n = value after reset
BIT FIELD
31 GPIO31_SPIDOUT_MUX
30 GPIO30_SPIDIN_MUX
29 GPIO29_SPICS1_MUX
28 GPIO28_SPICS0_MUX
27 GPIO27_UARTRTS1_MUX
26 GPIO26_UARTCTS1_MUX
25 GPIO25_UARTTX1_MUX
24 GPIO24_UARTRX1_MUX
23 GPIO23_UARTRTS0_MUX
22 GPIO22_UARTCTS0_MUX
21 GPIO21_UARTTX0_MUX
Table 8-21. Pin Control 0 Register Field Descriptions
DESCRIPTION
SPI or GPIO mux control
• 0 = SPIDOUT pin enabled
• 1 = GPIO31 pin enabled
SPI or GPIO mux control
• 0 = SPIDIN pin enabled
• 1 = GPIO30 pin enabled
SPI or GPIO mux control
• 0 = SPICS1 pin enabled
• 1 = GPIO29 pin enabled
SPI or GPIO mux control
• 0 = SPICS0 pin enabled
• 1 = GPIO28 pin enabled
UART or GPIO mux control
• 0 = UARTRTS1 pin enabled
• 1 = GPIO27 pin enabled
UART or GPIO mux control
• 0 = UARTCTS1 pin enabled
• 1 = GPIO26 pin enabled
UART or GPIO mux control
• 0 = UARTTX1 pin enabled
• 1 = GPIO25 pin enabled
UART or GPIO mux control
• 0 = UARTRX1 pin enabled
• 1 = GPIO24 pin enabled
UART or GPIO mux control
• 0 = UARTRTS0 pin enabled
• 1 = GPIO23 pin enabled
UART or GPIO mux control
• 0 = UARTCTS0 pin enabled
• 1 = GPIO22 pin enabled
UART or GPIO mux control
• 0 = UARTTX0 pin enabled
• 1 = GPIO21 pin enabled
214 Device Configuration
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