1N4007 Datasheet, PDF (20/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
www.ti.com
Table 4-2. Terminal Functions — Signals and Control by Function (continued)
SIGNAL NAME
DDRD21
DDRD22
DDRD23
DDRD24
DDRD25
DDRD26
DDRD27
DDRD28
DDRD29
DDRD30
DDRD31
DDRCE0
DDRCE1
DDRBA0
DDRBA1
DDRBA2
DDRA00
DDRA01
DDRA02
DDRA03
DDRA04
DDRA05
DDRA06
DDRA07
DDRA08
DDRA09
DDRA10
DDRA11
DDRA12
DDRA13
DDRA14
DDRA15
DDRCAS
DDRRAS
DDRWE
DDRCKE0
DDRCKE1
DDRCLKOUTP0
DDRCLKOUTN0
DDRCLKOUTP1
DDRCLKOUTN1
DDRODT0
DDRODT1
DDRRESET
DDRSLRATE0
DDRSLRATE1
VREFSSTL
BALL
NO.
B5
C5
D5
E2
F2
B1
C1
D1
D3
C3
E3
B15
C14
C18
D17
B19
D16
A19
E16
E15
B18
A17
C16
A18
D20
E20
E19
B20
D18
C20
E18
E17
D14
A15
E13
A16
A20
A14
B14
A21
B21
E14
D12
B16
C22
D22
E12
TYPE
IOZ
IOZ
IOZ
IOZ
IOZ
IOZ
IOZ
IOZ
IOZ
IOZ
IOZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
OZ
I
I
P
IPD/IPU
Down
Down
DESCRIPTION
DDR EMIF Data Bus
DDR EMIF Data Bus
DDR EMIF Chip Enables
DDR EMIF Bank Address
DDR EMIF Address Bus
DDR EMIF Column Address Strobe
DDR EMIF Row Address Strobe
DDR EMIF Write Enable
DDR EMIF Clock Enable
DDR EMIF Clock Enable
DDR EMIF Output Clocks to drive SDRAMs (one clock pair per SDRAM)
DDR EMIF On Die Termination Outputs used to set termination on the SDRAMs
DDR EMIF On Die Termination Outputs used to set termination on the SDRAMs
DDR Reset signal
DDR Slew rate control
Reference Voltage Input for SSTL15 buffers used by DDR EMIF (VDDS15 ÷ 2)
20
Terminal Configuration and Functions
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