1N4007 Datasheet, PDF (78/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
www.ti.com
6.4 Power Sleep Controller (PSC)
The Power Sleep Controller (PSC) controls overall device power by turning off unused power domains
and gating off clocks to individual peripherals and modules. The PSC provides the user with an interface
to control several important power and clock operations.
For information on the Power Sleep Controller, see the Power Sleep Controller (PSC) for KeyStone
Devices User's Guide.
6.4.1 Power Domains
The device has several power domains that can be turned on for operation or off to minimize power
dissipation. The global power/sleep controller (GPSC) is used to control the power gating of various power
domains.
Table 6-5 shows the C6654 and C6652 power domains.
DOMAIN
0
1
2
3
4
5
6
7
8
9
10
11
12
13
BLOCK(S)
Most peripheral logic
Per-core TETB and System TETB
Reserved
PCIe (C6654 only)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
C66x Core 0, L1/L2 RAMs
14
Reserved
15
Reserved
Table 6-5. Power Domains
NOTE
Cannot be disabled
RAMs can be powered down
Reserved
Logic can be powered down
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
L2 RAMs can sleep
Reserved
Reserved
POWER CONNECTION
Always on
Software control
Reserved
Software control
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Software control through C66x CorePac. For
details, see the C66x CorePac Reference
Guide.
Reserved
Reserved
78
Detailed Description
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