1N4007 Datasheet, PDF (206/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
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8.3.13 IPC Acknowledgement (IPCARx) Registers
IPCARx are the IPC interrupt-acknowledgement registers to facilitate inter-CorePac core interrupts.
The C6654 and C6652 have only IPCAR0. This register also provides a Source ID facility by which up to
28 different sources of interrupts can be identified. Allocation of source bits to source processor and
meaning is entirely based on software convention. The register field descriptions are shown in the
following tables. Virtually anything can be a source for these registers as this is completely controlled by
software. Any master that has access to BOOTCFG module space can write to these registers. The IPC
Acknowledgement Register is shown in Figure 8-12 and described in Table 8-14.
Figure 8-12. IPC Acknowledgement Registers (IPCARx)
31
30
29
28
27
8
SRCC SRCC SRCC SRCC
27
26
25
24
SRCC23 – SRCC4
RW +0 RW +0 RW +0 RW +0
RW +0 (per bit field)
Legend: R = Read only; RW = Read/Write; -n = value after reset
7
6
5
4
SRCC3 SRCC2 SRCC1 SRCC0
RW +0 RW +0 RW +0 RW +0
3
0
Reserved
R, +0000
BIT
31-4
FIELD
SRCCx
3-0 Reserved
Table 8-14. IPC Acknowledgement Registers (IPCARx) Field Descriptions
DESCRIPTION
Interrupt source acknowledgement.
Reads return current value of internal register bit.
Writes:
• 0 = No effect
• 1 = Clears both SRCCx and the corresponding SRCSx
Reserved
206 Device Configuration
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