1N4007 Datasheet, PDF (218/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
www.ti.com
8.4 Pullup and Pulldown Resistors
Proper board design should ensure that input pins to the device always be at a valid logic level and not
floating. This may be achieved through pullup and pulldown resistors. The device features internal pullup
(IPU) and internal pulldown (IPD) resistors on most pins to eliminate the need, unless otherwise noted, for
external pullup and pulldown resistors.
An external pullup or pulldown resistor needs to be used in the following situations:
• Device Configuration Pins: If the pin is both routed out and is not driven (in Hi-Z state), an external
pullup or pulldown resistor must be used, even if the IPU/IPD matches the desired value/state.
• Other Input Pins: If the IPU/IPD does not match the desired value/state, use an external pullup or
pulldown resistor to pull the signal to the opposite rail.
For the device configuration pins (listed in Table 8-1), if they are both routed out and are not driven (in Hi-
Z state), it is strongly recommended that an external pullup or pulldown resistor be implemented.
Although, internal pullup and pulldown resistors exist on these pins and they may match the desired
configuration value, providing external connectivity can help ensure that valid logic levels are latched on
these device configuration pins. In addition, applying external pullup and pulldown resistors on the device
configuration pins adds convenience to the user in debugging and flexibility in switching operating modes.
Tips for choosing an external pullup or pulldown resistor:
• Consider the total amount of current that may pass through the pullup or pulldown resistor. Make sure
to include the leakage currents of all the devices connected to the net, as well as any internal pullup or
pulldown resistors.
• Decide a target value for the net. For a pulldown resistor, this should be below the lowest V_IL level of
all inputs connected to the net. For a pullup resistor, this should be above the highest V_IH level of all
inputs on the net. A reasonable choice would be to target the V_OL or V_OH levels for the logic family of
the limiting device; which, by definition, have margin to the V_IL and V_IH levels.
• Select a pullup or pulldown resistor with the largest possible value that can still ensure that the net will
reach the target pulled value when maximum current from all devices on the net is flowing through the
resistor. The current to be considered includes leakage current plus, any other internal and external
pullup or pulldown resistors on the net.
• For bidirectional nets, there is an additional consideration that sets a lower limit on the resistance value
of the external resistor. Verify that the resistance is small enough that the weakest output buffer can
drive the net to the opposite logic level (including margin).
• Remember to include tolerances when selecting the resistor value.
• For pullup resistors, also remember to include tolerances on the DV_DD rail.
For most systems:
• A 1-kΩ resistor can be used to oppose the IPU/IPD while meeting the above criteria. Users should
confirm this resistor value is correct for their specific application.
• A 20-kΩ resistor can be used to compliment the IPU/IPD on the device configuration pins while
meeting the above criteria. Users should confirm this resistor value is correct for their specific
application.
For more detailed information on input current (I_I), and the low-level/high-level input voltages (V_IL and V_IH)
for the C6654 and C6652 devices, see Section 5.5.
To determine which pins on the device include internal pullup and pulldown resistors, see Table 4-2.
218 Device Configuration
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