 English |
|
|
|
|
|
|
|
| 1N4007 Datasheet, PDF (111/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A | |||
| |||
| ◁ |
www.ti.com
TMS320C6652, TMS320C6654
SPRS841D â MARCH 2012 â REVISED JUNE 2016
Table 6-27. CIC0 Event Inputs (Secondary Interrupts for C66x CorePacs) (continued)
INPUT EVENT NO. ON
CIC
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
81
82
84
85
86
87
88
89
90
SYSTEM INTERRUPT
Reserved
Reserved
PCIEXpress_ERR_INT
PCIEXpress_PM_INT
PCIEXpress_Legacy_INTA
PCIEXpress_Legacy_INTB
PCIEXpress_Legacy_CIC
PCIEXpress_Legacy_INTD
SPIINT0
SPIINT1
SPIXEVT
SPIREVT
I2CINT
I2CREVT
I2CXEVT
Reserved
Reserved
TETBHFULLINT
TETBFULLINT
TETBACQINT
TETBOVFLINT
TETBUNFLINT
SEMINT2
SEMINT3
SEMERR2
SEMERR3
Reserved
Tracer_core_0_INTD
Reserved
Reserved
Reserved
Tracer_DDR_INTD
Tracer_MSMC_0_INTD
Tracer_MSMC_1_INTD
Tracer_MSMC_2_INTD
Tracer_MSMC_3_INTD
Tracer_CFG_INTD
Tracer_QM_CFG_INTD
Tracer_QM_DMA_INTD
Tracer_SM_INTD
PSC_ALLINT
Reserved
BOOTCFG_INTD
po_vcon_smpserr_intr
MPU0_INTD
(MPU0_ADDR_ERR_INT and
MPU0_PROT_ERR_INT combined)
DESCRIPTION
Protocol error interrupt (C6654 only)
Power management interrupt (C6654 only)
Legacy interrupt mode (C6654 only)
Legacy interrupt mode (C6654 only)
Legacy interrupt mode (C6654 only)
Legacy interrupt mode (C6654 only)
SPI interrupt0
SPI interrupt1
Transmit event
Receive event
I2C interrupt
I2C receive event
I2C transmit event
TETB is half full
TETB is full
Acquisition has been completed
Overflow condition occur
Underflow condition occur
Semaphore interrupt
Semaphore interrupt
Semaphore interrupt
Semaphore interrupt
Tracer sliding time window interrupt for individual core
Tracer sliding time window interrupt for DDR3 EMIF1
Tracer sliding time window interrupt for MSMC SRAM bank0
Tracer sliding time window interrupt for MSMC SRAM bank1
Tracer sliding time window interrupt for MSMC SRAM bank2
Tracer sliding time window interrupt for MSMC SRAM bank3
Tracer sliding time window interrupt for CFG0 TeraNet
Tracer sliding time window interrupt for QM_SS CFG
Tracer sliding time window interrupt for QM_SS slave
Tracer sliding time window interrupt for semaphore
Power/sleep controller interrupt
Chip-level MMR error register
SmartReflex VolCon error status
MPU0 addressing violation interrupt and protection violation interrupt.
Copyright © 2012â2016, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TMS320C6652 TMS320C6654
Detailed Description 111
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese