1N4007 Datasheet, PDF (200/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
www.ti.com
8.3.7 Reset Status (RESET_STAT) Register
The reset status register (RESET_STAT) captures the status of Local reset (LRx) for each of the cores
and also the global device reset (GR). Software can use this information to take different device
initialization steps, if desired.
• In case of Local reset: The LRx bits are written as 1 and GR bit is written as 0 only when the CorePac
receives a local reset without receiving a global reset.
• In case of Global reset: The LRx bits are written as 0 and GR bit is written as 1 only when a global
reset is asserted.
The Reset Status Register is shown in Figure 8-6 and described in Table 8-8.
Figure 8-6. Reset Status Register (RESET_STAT)
31
30
GR
Reserved
R, +1
R, + 000 0000 0000 0000 0000 0000
Legend: R = Read only; -n = value after reset
2
1
0
Reserved
LR0
R,+0
R,+0
BIT FIELD
31
GR
30-2
1
0
Reserved
Reserved
LR0
Table 8-8. Reset Status Register (RESET_STAT) Field Descriptions
DESCRIPTION
Global reset status
• 0 = Device has not received a global reset.
• 1 = Device received a global reset.
Reserved.
Reserved.
CorePac0 reset status
• 0 = CorePac0 has not received a local reset.
• 1 = CorePac0 received a local reset.
200 Device Configuration
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