1N4007 Datasheet, PDF (173/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

www.ti.com
TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
6.24.2.6 SPI Boot Device Configuration
In SPI boot mode, the SPI device configuration uses 10 bits of device configuration instead of 7 as used in
other boot modes. SPI boot is shown in Figure 6-36 and described in Table 6-72.
Figure 6-36. SPI Device Configuration Bit Fields
12
11
Mode
10
4, 5 Pin
9
Addr Width
8
7
Chip Select
6
5
4
3
Parameter Table Index
Bit
12-11
Field
Mode
10
4, 5 Pin
9
Addr Width
8-7
Chip Select
6-3
Parameter Table
Index
Table 6-72. SPI Device Configuration Field Descriptions
Description
Clk Pol / Phase
• 0 = Data is output on the rising edge of SPICLK. Input data is latched on the falling edge.
• 1 = Data is output one half-cycle before the first rising edge of SPICLK and on subsequent falling
edges. Input data is latched on the rising edge of SPICLK.
• 2 = Data is output on the falling edge of SPICLK. Input data is latched on the rising edge.
• 3 = Data is output one half-cycle before the first falling edge of SPICLK and on subsequent rising
edges. Input data is latched on the falling edge of SPICLK.
SPI operation mode configuration
• 0 = 4-pin mode used
• 1 = 5-pin mode used
SPI address width configuration
• 0 = 16-bit address values are used
• 1 = 24-bit address values are used
The chip select field value
Specifies which parameter table is loaded
Copyright © 2012–2016, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TMS320C6652 TMS320C6654
Detailed Description 173