1N4007 Datasheet, PDF (204/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
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8.3.11 NMI Event Generation to CorePac (NMIGRx) Register
NMIGRx registers are used for generating NMI events to the CorePac. The C6654 and C6652 have only
NMIGR0, which generates an NMI event to the CorePac. Writing 1 to the NMIG field generates an NMI
pulse. Writing 0 has no effect and reads return 0 and have no other effect. The NMI Event Generation to
CorePac Register is shown in Figure 8-10 and described in Table 8-12.
Figure 8-10. NMI Generation Register (NMIGRx)
31
Reserved
R, +0000 0000 0000 0000 0000 0000 0000 000
Legend: RW = Read/Write; -n = value after reset
1
0
NMIG
RW,+0
BIT
31-1
0
FIELD
Reserved
NMIG
Table 8-12. NMI Generation Register (NMIGRx) Field Descriptions
DESCRIPTION
Reserved
NMI pulse generation.
Reads return 0
Writes:
• 0 = No effect
• 1 = Sends an NMI pulse to the CorePac
204 Device Configuration
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