1N4007 Datasheet, PDF (138/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
www.ti.com
6.10.2.4 MPU Registers Reset Values
Table 6-46, Table 6-47, Table 6-48, Table 6-49, and Table 6-50 describe the MPU register resets.
Table 6-46. Programmable Range n Registers Reset Values for MPU0
PROGRAMMA START ADDRESS
BLE RANGE (PROGn_MPSAR)
PROG0
0x01D0_0000
PROG1
0x01F0_0000
PROG2
0x0200_0000
PROG3
0x01E0_0000
PROG4
0x021C_0000
PROG5
0x021F_0000
PROG6
0x0220_0000
PROG7
0x0231_0000
PROG8
0x0232_0000
PROG9
0x0233_0000
PROG10
0x0235_0000
PROG11
0x0240_0000
PROG12
PROG13
PROG14
PROG15
0x0250_0000
0x0253_0000
0x0260_0000
0x0262_0000
MPU0 (MAIN CFG TERANET)
END ADDRESS
(PROGn_MPEAR)
MEMORY PAGE
PROTECTION ATTRIBUTE
(PROGn_MPPA)
0x01D8_007F
0x03FF_FCB6
0x01F7_FFFF
0x03FF_FC80
0x0209_FFFF
0x03FF_FCB6
0x01EB_FFFF
0x03FF_FCB6
0x021E_0C3F
0x03FF_FCB6
0x021F_7FFF
0x03FF_FCB6
0x0227_007F
0x03FF_FCB6
0x0231_03FF
0x03FF_FCB4
0x0232_03FF
0x03FF_FCB4
0x0233_03FF
0x03FF_FCB4
0x0235_0FFF
0x03FF_FCB4
0x0245_3FFF
0x03FF_FCB6
0x0252_03FF
0x0255_03FF
0x0260_BFFF
0x0262_07FF
0x03FF_FCB4
0x03FF_FCB6
0x03FF_FCB4
0x03FF_FCB4
MEMORY PROTECTION
Tracers
Reserved
Reserved
Reserved
Reserved
Reserved
Timers
PLL
GPIO
SmartReflex
PSC
DEBUG_SS, Tracer
Formatters
EFUSE
I²C, UART
CICs
Chip-level Registers
Table 6-47. Programmable Range n Registers Reset Values for MPU1
PROGRAMMA START ADDRESS
BLE RANGE (PROGn_MPSAR)
PROG0
0x3400_0000
PROG1
0x3402_0000
PROG2
0x3406_0000
PROG3
0x3406_8000
PROG4
0x340B_8000
MPU1 (QM_SS DATA PORT)
END ADDRESS
(PROGn_MPEAR)
MEMORY PAGE
PROTECTION ATTRIBUTE
(PROGn_MPPA)
0x3401_FFFF
0x03FF_FC80
0x3405_FFFF
0x000F_FCB6
0x3406_7FFF
0x03FF_FCB4
0x340B_7FFF
0x03FF_FC80
0x340B_FFFF
0x03FF_FCB6
MEMORY PROTECTION
Queue Manager subsystem
data
138 Detailed Description
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