1N4007 Datasheet, PDF (68/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
5.7.17 Trace Electrical Data/Timing
Table 5-27. DSP Trace Switching Characteristics⁽¹⁾
(See Figure 5-31.)
NO.
PARAMETER
1
tw(DPnH)
Pulse duration, DPn/EMUn high detected at 50% Voh
1
t_w(DPnH)90%
Pulse duration, DPn/EMUn high detected at 90% Voh
2
t_w(DPnL)
Pulse duration, DPn/EMUnlow detected at 50% Voh
2
t_w(DPnL)10%
Pulse duration, DPn/EMUnlow detected at 10% Voh
3
t_sko(DPn)
Output skew time, time delay difference between DPn/EMUnpins configured as
trace
t_skp(DPn)
Pulse skew, magnitude of difference between high-to-low (tphl) and low-to-high
(tplh) propagation delays.
t_{σλδπ_o}(DPn)
Output slew rate DPn/EMUn
(1) Over recommended operating conditions.
Table 5-28. STM Trace Switching Characteristics ⁽¹⁾
(See Figure 5-31.)
NO.
PARAMETER
1
t_w(DPnH)
1
t_w(DPnH)90%
2
t_w(DPnL)
2
t_w(DPnL)10%
3
t_sko(DPn)
Pulse duration, DPn/EMUn high detected at 50% Voh with 60/40 duty cycle
Pulse duration, DPn/EMUn high detected at 90% Voh
Pulse duration, DPn/EMUn low detected at 50% Voh with 60/40 duty cycle
Pulse duration, DPn/EMUn low detected at 10% Voh
Output skew time, time delay difference between DPn/EMUn pins configured
as trace
t_skp(DPn)
Pulse skew, magnitude of difference between high-to-low (tphl) and low-to-high
(tplh) propagation delays.
t_{σλδπ_o}(DPn)
Output slew rate DPn/EMUn
(1) Over recommended operating conditions.
A
T_PLH
B
T_PHL
1
2
3
C
A. EMUx represents the EMU output pin configured as the trace clock output.
EMUy and EMUz represent all of the trace output data pins.
Figure 5-31. Trace Timing
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MIN
MAX UNIT
2.4
ns
1.5
ns
2.4
ns
1.5
ns
–1
1 ns
600 ps
3.3
V/ns
MIN
MAX UNIT
4
ns
3.5
ns
4
ns
3.5
ns
–1
1 ns
1 ns
3.3
V/ns
68
Specifications
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