1N4007 Datasheet, PDF (209/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

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TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
8.3.16 Timer Input Selection Register (TINPSEL)
Timer input selection is handled within the control register TINPSEL. The Timer Input Selection Register is
shown in Figure 8-15 and described in Table 8-17.
Figure 8-15. Timer Input Selection Register (TINPSEL)
31
Reserved
R, [phone] 1010
15
14
13
12
11
10
9
8
7
6
TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL
SEL7 SEL7 SEL6 SEL6 SEL5 SEL5 SEL4 SEL4 SEL3 SEL3
RW, RW, RW, RW, RW, RW, RW, RW, RW, RW,
+1
+0
+1
+0
+1
+0
+1
+0
+1
+0
Legend: R = Read only; RW = Read/Write; -n = value after reset
5
TINPH
SEL2
RW,
+1
4
TINPL
SEL2
RW,
+0
3
TINPH
SEL1
RW,
+1
2
TINPL
SEL1
RW,
+0
1
TINPH
SEL0
RW,
+1
16
0
TINPL
SEL0
RW,
+0
BIT FIELD
31-16 Reserved
15
TINPHSEL7
14
TINPLSEL7
13
TINPHSEL6
12
TINPLSEL6
11
TINPHSEL5
10
TINPLSEL5
9
TINPHSEL4
8
TINPLSEL4
7
TINPHSEL3
6
TINPLSEL3
5
TINPHSEL2
Table 8-17. Timer Input Selection Field Description (TINPSEL)
DESCRIPTION
• Reserved
Input select for TIMER7 high.
• 0 = TIMI0
• 1 = TIMI1
Input select for TIMER7 low.
• 0 = TIMI0
• 1 = TIMI1
Input select for TIMER6 high.
• 0 = TIMI0
• 1 = TIMI1
Input select for TIMER6 low.
• 0 = TIMI0
• 1 = TIMI1
Input select for TIMER5 high.
• 0 = TIMI0
• 1 = TIMI1
Input select for TIMER5 low.
• 0 = TIMI0
• 1 = TIMI1
Input select for TIMER4 high.
• 0 = TIMI0
• 1 = TIMI1
Input select for TIMER4 low.
• 0 = TIMI0
• 1 = TIMI1
Input select for TIMER3 high.
• 0 = TIMI0
• 1 = TIMI1
Input select for TIMER3 low.
• 0 = TIMI0
• 1 = TIMI1
Input select for TIMER2 high.
• 0 = TIMI0
• 1 = TIMI1
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Device Configuration 209