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1N4007 Datasheet, PDF (109/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A
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TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
Table 6-26. C6654 and C6652 System Event Inputs — C66x CorePac Primary Interrupts (continued)
INPUT EVENT
NUMBER
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
INTERRUPT EVENT
GPINT9
GPINT10
GPINT11
GPINT12
GPINT13
GPINT14
GPINT15
IPC_LOCAL
GPINTn (8)
CIC0_OUT(10+20*n) (6)
CIC0_OUT(11+20*n) (6)
MACTXINTn (5)
MACTRESHn (5)
INTERR
EMC_IDMAERR
Reserved
MACRXINTn (5)
EFIINTA
EFIINTB
QM_INT_HIGH_(n+2) (6)
QM_INT_HIGH_(n+6) (6)
QM_INT_HIGH_(n+10) (6)
QM_INT_HIGH_(n+14) (6)
QM_INT_HIGH_(n+18) (6)
QM_INT_HIGH_(n+22) (6)
QM_INT_HIGH_(n+26) (6)
QM_INT_HIGH_(n+30) (6)
MDMAERREVT
Reserved
Reserved
PMC_ED
Reserved
EDMA3_CC_AETEVT
UMC_ED1
UMC_ED2
PDC_INT
SYS_CMPA
PMC_CMPA
PMC_DMPA
DMC_CMPA
DMC_DMPA
UMC_CMPA
UMC_DMPA
EMC_CMPA
EMC_BUSERR
DESCRIPTION
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
Inter DSP interrupt from IPCGRn
Local GPIO interrupt
Interrupt Controller Output
Interrupt Controller Output
EMAC interrupt (C6654 only)
EMAC interrupt (C6654 only)
Dropped CPU interrupt event
Invalid IDMA parameters
EMAC interrupt (C6654 only)
EFI Interrupt from side A
EFI Interrupt from side B
QM Interrupt for Queue 706+n(6)
QM Interrupt for Queue 710+n(6)
QM Interrupt for Queue 714+n(6)
QM Interrupt for Queue 718+n(6)
QM Interrupt for Queue 722+n(6)
QM Interrupt for Queue 726+n(6)
QM Interrupt for Queue 730+n(6)
QM Interrupt for Queue 734+n(6)
VbusM error event
Single bit error detected during DMA read
EDMA3 CC AET Event
Corrected bit error detected
Uncorrected bit error detected
Power down sleep interrupt
SYS CPU memory protection fault event
PMC CPU memory protection fault event
PMC DMA memory protection fault event
DMC CPU memory protection fault event
DMC DMA memory protection fault event
UMC CPU memory protection fault event
UMC DMA memory protection fault event
EMC CPU memory protection fault event
EMC bus error interrupt
(8) CorePac[n] will receive GPINTn.
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Detailed Description 109
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