1N4007 Datasheet, PDF (183/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

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TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
7 C66x CorePac
The C66x CorePac consists of several components:
• The C66x DSP and associated C66x CorePac core
• Level-one and level-two memories (L1P, L1D, L2)
• Data Trace Formatter (DTF)
• Embedded Trace Buffer (ETB)
• Interrupt Controller
• Power-down controller
• External Memory Controller
• Extended Memory Controller
• A dedicated power/sleep controller (LPSC)
The C66x CorePac also provides support for memory protection, bandwidth management (for resources
local to the C66x CorePac) and address extension. Figure 7-1 shows a block diagram of the C66x
CorePac.
32KB L1P
Boot
Controller
PLLC
LPSC
GPSC
Program Memory Controller (PMC) With
Memory Protect/Bandwidth Mgmt
C66x DSP Core
Instruction Fetch
16-/32-bit Instruction Dispatch
Control Registers
In-Circuit Emulation
Instruction Decode
Data Path A
Data Path B
A Register File
A31-A16
A15-A0
B Register File
B31-B16
B15-B0
.M1
.L1 .S1 xx .D1
xx
.M2
.D2 xx .S2 .L2
xx
L2 Cache/
SRAM
1024KB
DDR3
SRAM
DMA Switch
Fabric
Data Memory Controller (DMC) With
Memory Protect/Bandwidth Mgmt
CFG Switch
Fabric
32KB L1D
Figure 7-1. C66x CorePac Block Diagram
For more detailed information on the TMS320C66x CorePac on the C6654 and C6652 devices, see the
C66x CorePac User's Guide.
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C66x CorePac 183