C8051F02X Datasheet, PDF (89/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F020/1/2/3
Table 8.1. DAC Electrical Characteristics
VDD = 3.0 V, AV+ = 3.0 V, VREF = 2.40 V (REFBE = 0), No Output Load unless otherwise specified
PARAMETER
CONDITIONS
MIN TYP MAX
STATIC PERFORMANCE
Resolution
12
Integral Nonlinearity
±2
Differential Nonlinearity
±1
Output Noise
No Output Filter
250
100 kHz Output Filter
128
10 kHz Output Filter
41
Offset Error
Data Word = 0x014
±3 ±30
Offset Tempco
6
Gain Error
±20 ±60
Gain-Error Tempco
10
VDD Power Supply Rejection
-60
Ratio
Output Impedance in Shutdown DACnEN = 0
100
Mode
Output Sink Current
300
Output Short-Circuit Current
Data Word = 0xFFF
15
DYNAMIC PERFORMANCE
Voltage Output Slew Rate
Load = 40pF
0.44
Output Settling Time to 1/2 LSB Load = 40pF, Output swing from code
10
0xFFF to 0x014
Output Voltage Swing
0
VREF-
1LSB
Startup Time
10
ANALOG OUTPUTS
Load Regulation
I_L = 0.01mA to 0.3mA at code 0xFFF
60
POWER CONSUMPTION (each DAC)
Power Supply Current (AV+ sup- Data Word = 0x7FF
plied to DAC)
110 400
UNITS
bits
LSB
LSB
µVrms
mV
ppm/°C
mV
ppm/°C
dB
kΩ
µA
mA
V/µs
µs
V
µs
ppm
µA
Rev. 1.4
89