C8051F02X Datasheet, PDF (62/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F022/3
6.2.3. Settling Time Requirements
When the ADC0 input configuration is changed (i.e., a different MUX or PGA selection is made), a minimum settling
(or tracking) time is required before an accurate conversion can be performed. This settling time is determined by the
ADC0 MUX resistance, the ADC0 sampling capacitance, any external source resistance, and the accuracy required
for the conversion. Figure 6.4 shows the equivalent ADC0 input circuits for both Differential and Single-ended
modes. Notice that the equivalent time constant for both input circuits is the same. The required settling time for a
given settling accuracy (SA) may be approximated by Equation 6.1. When measuring the Temperature Sensor output,
R_TOTAL reduces to R_MUX. Note that in low-power tracking mode, three SAR clocks are used for tracking at the start of
every conversion. For most applications, these three SAR clocks will meet the settling time requirements. See
Table 6.1 on page 74 for minimum settling/tracking time requirements.
Equation 6.1. ADC0 Settling Time Requirements
t
=
ln


S^-2---A^{-n-}
×
R_TOTALC_SAMPLE
Where:
SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)
t is the required settling time in seconds
R_TOTAL is the sum of the ADC0 MUX resistance and any external source resistance.
n is the ADC resolution in bits (10).
Figure 6.4. ADC0 Equivalent Input Circuits
Differential Mode
MUX Select
AIN0.x
R_MUX = 5k
RC_Input= R_MUX * C_SAMPLE
AIN0.y
R_MUX = 5k
MUX Select
C_SAMPLE = 10pF
C_SAMPLE = 10pF
Single-Ended Mode
MUX Select
AIN0.x
R_MUX = 5k
RC_Input= R_MUX * C_SAMPLE
C_SAMPLE = 10pF
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Rev. 1.4