C8051F02X Datasheet, PDF (119/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F020/1/2/3
12.3.5. Interrupt Register Descriptions
The SFRs used to enable the interrupt sources and set their priority level are described below. Refer to the datasheet
section associated with a particular on-chip peripheral for information regarding valid interrupt conditions for the
peripheral and the behavior of its interrupt-pending flag(s).
Figure 12.9. IE: Interrupt Enable
R/W
R/W
R/W
EA
IEGF0
ET2
Bit7
Bit6
Bit5
R/W
ES0
Bit4
R/W
ET1
Bit3
R/W
EX1
Bit2
R/W
ET0
Bit1
R/W
Reset Value
EX0 00000000
Bit0 SFR Address:
(bit addressable) 0xA8
Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
EA: Enable All Interrupts.
This bit globally enables/disables all interrupts. When set to ‘0’, individual interrupt mask settings are
overridden.
0: Disable all interrupt sources.
1: Enable each interrupt according to its individual mask setting.
IEGF0: General Purpose Flag 0.
This is a general purpose flag for use under software control.
ET2: Enabler Timer 2 Interrupt.
This bit sets the masking of the Timer 2 interrupt.
0: Disable Timer 2 interrupt.
1: Enable interrupt requests generated by the TF2 flag (T2CON.7).
ES0: Enable UART0 Interrupt.
This bit sets the masking of the UART0 interrupt.
0: Disable UART0 interrupt.
1: Enable UART0 interrupt.
ET1: Enable Timer 1 Interrupt.
This bit sets the masking of the Timer 1 interrupt.
0: Disable all Timer 1 interrupt.
1: Enable interrupt requests generated by the TF1 flag (TCON.7).
EX1: Enable External Interrupt 1.
This bit sets the masking of external interrupt 1.
0: Disable external interrupt 1.
1: Enable interrupt requests generated by the /INT1 pin.
ET0: Enable Timer 0 Interrupt.
This bit sets the masking of the Timer 0 interrupt.
0: Disable all Timer 0 interrupt.
1: Enable interrupt requests generated by the TF0 flag (TCON.5).
EX0: Enable External Interrupt 0.
This bit sets the masking of external interrupt 0.
0: Disable external interrupt 0.
1: Enable interrupt requests generated by the /INT0 pin.
Rev. 1.4
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