C8051F02X Datasheet, PDF (169/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F020/1/2/3
Figure 17.6. Crossbar Example:
(EMIFLE = 1; EMIF in Multiplexed Mode; P1MDIN = 0xE3;
XBR0 = 0x05; XBR1 = 0x14; XBR2 = 0x46)
P0
P1
P2
P3
Crossbar Register Bits
PIN I/O 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
TX0
●
RX0
●
UART0EN: XBR0.2
SCK
●●
MISO
MOSI
●●
●●
SPI0EN: XBR0.1
NSS
●
●
SDA
●●●
●
SCL
●●
●
●
SMB0EN: XBR0.0
TX1
●●●
RX1
●●
●
●
●
●●●
UART1EN: XBR2.2
CEX0
●
●
●
●
●●●
CEX1
●●
●
●●●●●
CEX2
●●
●
●●●●●
PCA0ME: XBR0.[5:3]
CEX3
●
●
●●●●●●●
CEX4
●
●
●●●●●●●
ECI
●●●●●
●●
●●●●●●●●●
ECI0E: XBR0.6
CP0
●●●●●
●●
●●●●●●●●●●
CP0E: XBR0.7
CP1
●●●●●
●●
●●●●●●●●●●●
CP1E: XBR1.0
T0
●●●●●
●●
●●●●●●●●●●●●
T0E: XBR1.1
/INT0 ● ● ● ● ●
●●
●●●●●●●●●●●●●
INT0E: XBR1.2
T1
●●●●●
●●
●●●●●●●●●●●●●●
T1E: XBR1.3
/INT1 _{● ● ● ● ●}
●●
●●●●●●●●●●●●●●●
INT1E: XBR1.4
T2
●●●●●
●●
●●●●●●●●●●●●●●●●
T2E: XBR1.5
T2EX ● ● ● ● ●
●●
●●●●●●●●●●●●●●●●●
T2EXE: XBR1.6
T4
●●●●●
●●
●●●●●●●●●●●●●●●●●●
T4E: XBR2.3
T4EX _{● ● ● ● ●}
●●
●●●●●●●●●●●●●●●●●●●
T4EXE: XBR2.4
/SYSCLK _{● ● ● ● ●}
●●
● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ^{SYSCKE: XBR1.7}
CNVSTR _{● ● ● ● ●}
●●
● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ^{CNVSTE: XBR2.0}
AIN1 Inputs/Non-muxed Addr H Muxed Addr H/Non-muxed Addr L Muxed Data/Non-muxed Data
Rev. 1.4
169