C8051F02X Datasheet, PDF (117/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F020/1/2/3
Table 12.4. Interrupt Summary
Interrupt Source
Interrupt
Vector
Priority
Order
Pending Flag
Enable
Flag
Priority
Control
Reset
External Interrupt 0 (/INT0)
Timer 0 Overflow
External Interrupt 1 (/INT1)
Timer 1 Overflow
UART0
Timer 2 Overflow (or EXF2)
Serial Peripheral Interface
0x0000
0x0003
0x000B
0x0013
0x001B
0x0023
0x002B
0x0033
SMBus Interface
0x003B
ADC0 Window Comparator 0x0043
Programmable Counter Array 0x004B
Comparator 0 Falling Edge 0x0053
Comparator 0 Rising Edge
0x005B
Comparator 1 Falling Edge 0x0063
Comparator 1 Rising Edge
0x006B
Timer 3 Overflow
0x0073
ADC0 End of Conversion
0x007B
Timer 4 Overflow
0x0083
ADC1 End of Conversion
0x008B
External Interrupt 6
0x0093
External Interrupt 7
0x009B
UART1
0x00A3
External Crystal OSC Ready 0x00AB
Top None
N/A
N/A
Always
Enabled
Always
Highest
0 IE0 (TCON.1)
Y Y EX0 (IE.0) PX0 (IP.0)
1 TF0 (TCON.5)
Y Y ET0 (IE.1) PT0 (IP.1)
2 IE1 (TCON.3)
Y Y EX1 (IE.2) PX1 (IP.2)
3 TF1 (TCON.7)
Y Y ET1 (IE.3) PT1 (IP.3)
4
RI0 (SCON0.0)
TI0 (SCON0.1)
Y
ES0 (IE.4) PS0 (IP.4)
5 TF2 (T2CON.7) Y
ET2 (IE.5) PT2 (IP.5)
6 SPIF (SPI0CN.7) Y
ESPI0
PSPI0
(EIE1.0) (EIP1.0)
7 SI (SMB0CN.3) Y
ESMB0 PSMB0
(EIE1.1) (EIP1.1)
8
AD0WINT
(ADC0CN.2)
Y
EWADC0 PWADC0
(EIE1.2) (EIP1.2)
CF (PCA0CN.7)
9 CCFn
Y
(PCA0CN.n)
EPCA0 PPCA0
(EIE1.3) (EIP1.3)
10
CP0FIF
(CPT0CN.4)
ECP0F PCP0F
(EIE1.4) (EIP1.4)
11
CP0RIF
(CPT0CN.5)
ECP0R PCP0R
(EIE1.5) (EIP1.5)
12
CP1FIF
(CPT1CN.4)
ECP1F PCP1F
(EIE1.6) (EIP1.6)
13
CP1RIF
(CPT1CN.5)
ECP1R PCP1F
(EIE1.7) (EIP1.7)
14 TF3 (TMR3CN.7)
ET3
PT3
(EIE2.0) (EIP2.0)
15
AD0INT
(ADC0CN.5)
Y
EADC0 PADC0
(EIE2.1) (EIP2.1)
16 TF4 (T4CON.7)
ET4
PT4
(EIE2.2) (EIP2.2)
17
AD1INT
(ADC1CN.5)
EADC1 PADC1
(EIE2.3) (EIP2.3)
18 IE6 (P3IF.5)
EX6
PX6
(EIE2.4) (EIP2.4)
19 IE7 (P3IF.6)
EX7
PX7
(EIE2.5) (EIP2.5)
20
RI1 (SCON1.0)
TI1 (SCON1.1)
ES1
PS1
21
XTLVLD
(OSCXCN.7)
EXVLD PXVLD
(EIE2.7) (EIP2.7)
Rev. 1.4
117