C8051F02X Datasheet, PDF (242/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F020/1/2/3
Figure 22.22. TMR3RLH: Timer 3 Reload Register High Byte
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0 SFR Address:
0x93
Bits 7-0: TMR3RLH: Timer 3 Reload Register High Byte.
Timer 3 is configured as an auto-reload timer. This register holds the high byte of the reload value.
Figure 22.23. TMR3L: Timer 3 Low Byte
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bits 7-0: TMR3L: Timer 3 Low Byte.
The TMR3L register is the low byte of Timer 3.
R/W
Reset Value
00000000
Bit0 SFR Address:
0x94
Figure 22.24. TMR3H: Timer 3 High Byte
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bits 7-0: TMR3H: Timer 3 High Byte.
The TMR3H register is the high byte of Timer 3.
R/W
Reset Value
00000000
Bit0 SFR Address:
0x95
242
Rev. 1.4