C8051F02X Datasheet, PDF (245/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F020/1/2/3
22.3.2. Mode 1: 16-bit Counter/Timer with Auto-Reload
The Counter/Timer with Auto-Reload mode sets the TF4 timer overflow flag when the counter/timer register over-
flows from 0xFFFF to 0x0000. An interrupt is generated if enabled. On overflow, the 16-bit value held in the two
capture registers (RCAP4H, RCAP4L) is automatically loaded into the counter/timer register and the timer is
restarted.
Counter/Timer with Auto-Reload mode is selected by clearing the CP/RL4 bit. Setting TR4 to logic 1 enables and
starts the timer. Timer 4 can use either the system clock or transitions on an external input pin (T2) as its clock source,
as specified by the C/T4 bit. If EXEN4 is set to logic 1, a high-to-low transition on T4EX will also cause a Timer 4
reload, and a Timer 4 interrupt if enabled. If EXEN4 is logic 0, transitions on T4EX will be ignored.
Figure 22.26. T4 Mode 1 Block Diagram
CKCON
TTTT
4210
MMMM
SYSCLK
12
0
1
0
T4
T4EX
Crossbar
EXEN4
1
TR4
TCLK
TL4
TH4
Reload _{RCAP4L RCAP4H}
CP/RL4
C/T4
TR4
EXEN4
TCLK0
RCLK0
EXF4
TF4
Interrupt
Rev. 1.4
245