C8051F02X Datasheet, PDF (236/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F020/1/2/3
22.1.2. Mode 1: 16-bit Counter/Timer with Auto-Reload
The Counter/Timer with Auto-Reload mode sets the TF2 timer overflow flag when the counter/timer register over-
flows from 0xFFFF to 0x0000. An interrupt is generated if enabled. On overflow, the 16-bit value held in the two
capture registers (RCAP2H, RCAP2L) is automatically loaded into the counter/timer register and the timer is
restarted.
Counter/Timer with Auto-Reload mode is selected by clearing the CP/RL2 bit. Setting TR2 to logic 1 enables and
starts the timer. Timer 2 can use either the system clock or transitions on an external input pin (T2) as its clock source,
as specified by the C/T2 bit. If EXEN2 is set to logic 1, a high-to-low transition on T2EX will also cause a Timer 2
reload, and a Timer 2 interrupt if enabled. If EXEN2 is logic 0, transitions on T2EX will be ignored.
Figure 22.12. T2 Mode 1 Block Diagram
CKCON
TTTT
4210
MMMM
SYSCLK
12
0
1
0
T2
T2EX
Crossbar
EXEN2
1
TR2
TCLK
TL2
TH2
Reload _{RCAP2L RCAP2H}
CP/RL2
C/T2
TR2
EXEN2
TCLK0
RCLK0
EXF2
TF2
Interrupt
236
Rev. 1.4