C8051F02X Datasheet, PDF (266/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F020/1/2/3
24.1. Boundary Scan
The DR in the Boundary Scan path is an 134-bit shift register. The Boundary DR provides control and observability
of all the device pins as well as the SFR bus and Weak Pullup feature via the EXTEST and SAMPLE commands.
Table 24.1. Boundary Data Register Bit Definitions
EXTEST provides access to both capture and update actions, while Sample only performs a capture.
Bit
Action Target
0
Capture Reset Enable from MCU (C8051F021/3 devices)
Update Reset Enable to /RST pin (C8051F021/3 devices)
1
Capture Reset input from /RST pin (C8051F021/3 devices)
Update Reset output to /RST pin (C8051F021/3 devices)
2
Capture Reset Enable from MCU (C8051F020/2 devices)
Update Reset Enable to /RST pin (C8051F020/2 devices)
3
Capture Reset input from /RST pin (C8051F020/2 devices)
Update Reset output to /RST pin (C8051F020/2 devices)
4
Capture External Clock from XTAL1 pin
Update Not used
5
Capture Weak pullup enable from MCU
Update Weak pullup enable to Port Pins
6, 8, 10, 12, 14, 16, Capture P0.n output enable from MCU (e.g. Bit6=P0.0, Bit8=P0.1, etc.)
18, 20
Update P0.n output enable to pin (e.g. Bit6=P0.0oe, Bit8=P0.1oe, etc.)
7, 9, 11, 13, 15, 17, Capture P0.n input from pin (e.g. Bit7=P0.0, Bit9=P0.1, etc.)
19, 21
Update P0.n output to pin (e.g. Bit7=P0.0, Bit9=P0.1, etc.)
22, 24, 26, 28, 30, Capture P1.n output enable from MCU
32, 34, 36
Update P1.n output enable to pin
23, 25, 27, 29, 31, Capture P1.n input from pin
33, 35, 37
Update P1.n output to pin
38, 40, 42, 44, 46, Capture P2.n output enable from MCU
48, 50, 52
Update P2.n output enable to pin
39, 41, 43, 45, 47, Capture P2.n input from pin
49, 51, 53
Update P2.n output to pin
54, 56, 58, 60, 62, Capture P3.n output enable from MCU
64, 66, 68
Update P3.n output enable to pin
55, 57, 59, 61, 63, Capture P3.n input from pin
65, 67, 69
Update P3.n output to pin
70, 72, 74, 76, 78, Capture P4.n output enable from MCU
80, 82, 84
Update P4.n output enable to pin
71, 73, 75, 77, 79, Capture P4.n input from pin
81, 83, 85
Update P4.n output to pin
86, 88, 90, 92, 94, Capture P5.n output enable from MCU
96, 98, 100
Update P5.n output enable to pin
87, 89, 91, 93, 95, Capture P5.n input from pin
97, 99, 101
Update P5.n output to pin
102, 104, 106, 108, Capture P6.n output enable from MCU
110, 112, 114, 116 Update P6.n output enable to pin
103, 105, 107, 109, Capture P6.n input from pin
111, 113, 115, 117 _{Update P6.n output to pin}
266
Rev. 1.4