C8051F02X Datasheet, PDF (184/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F020/1/2/3
Figure 18.2 shows a typical SMBus configuration. The SMBus0 interface will work at any voltage between 3.0 V and
5.0 V and different devices on the bus may operate at different voltage levels. The bi-directional SCL (serial clock)
and SDA (serial data) lines must be connected to a positive power supply voltage through a pull-up resistor or similar
circuit. Every device connected to the bus must have an open-drain or open-collector output for both the SCL and
SDA lines, so that both are pulled high when the bus is free. The maximum number of devices on the bus is limited
only by the requirement that the rise and fall times on the bus will not exceed 300 ns and 1000 ns, respectively.
VDD = 5V
Figure 18.2. Typical SMBus Configuration
VDD = 3V
VDD = 5V
VDD = 3V
Master
Device
Slave
Device 1
Slave
Device 2
18.1. Supporting Documents
It is assumed the reader is familiar with or has access to the following supporting documents:
1. The I²C-bus and how to use it (including specifications), Philips Semiconductor.
2. The I²C-Bus Specification -- Version 2.0, Philips Semiconductor.
3. System Management Bus Specification -- Version 1.1, SBS Implementers Forum.
SDA
SCL
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