C8051F02X Datasheet, PDF (133/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F020/1/2/3
Table 13.1. Reset Electrical Characteristics
-40°C to +85°C unless otherwise specified.
PARAMETER
CONDITIONS
/RST Output High Voltage
I_OH = -3 mA
/RST Output Low Voltage
I_OL = 8.5 mA, VDD = 2.7 V to 3.6 V
/RST Input High Voltage
MIN
VDD -
0.7
0.7 x
VDD
/RST Input Low Voltage
/RST Input Leakage Current
/RST = 0.0 V
VDD for /RST Output Valid
1.0
AV+ for /RST Output Valid
1.0
VDD POR Threshold (V_RST)
2.40
Minimum /RST Low Time to
Generate a System Reset
10
Reset Time Delay
/RST rising edge after VDD crosses
V_RST threshold
80
Missing Clock Detector Timeout
Time from last system clock to reset
initiation
100
TYP
50
2.55
100
220
MAX UNITS
V
0.6
V
V
0.3 x
VDD
µA
V
V
2.70
V
ns
120
ms
500
µs
Rev. 1.4
133