C8051F02X Datasheet, PDF (143/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F020/1/2/3
Figure 15.3. FLSCL: FLASH Memory Control
R/W
FOSE
Bit7
R/W
FRAE
Bit6
R/W
Reserved
Bit5
R/W
Reserved
Bit4
R/W
Reserved
Bit3
R/W
Reserved
Bit2
R/W
Reserved
Bit1
R/W
FLWE
Bit0
Reset Value
10000000
SFR Address:
0xB6
Bit7:
Bit6:
Bits5-1:
Bit0:
FOSE: FLASH One-Shot Timer Enable
This is the timer that turns off the sense amps after a FLASH read.
0: FLASH One-Shot Timer disabled.
1: FLASH One-Shot Timer enabled.
FRAE: FLASH Read Always Enable
0: FLASH reads per One-Shot Timer.
1: FLASH always in read mode.
RESERVED. Read = 00000b. Must Write 00000b.
FLWE: FLASH Read/Write Enable
This bit must be set to allow FLASH writes from user software.
0: FLASH writes disabled.
1: FLASH writes enabled.
Rev. 1.4
143