C8051F02X Datasheet, PDF (144/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F020/1/2/3
Figure 15.4. PSCTL: Program Store Read/Write Control
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
-
-
-
-
-
SFLE
PSEE
PSWE 00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0 SFR Address:
0x8F
Bits7-3:
Bit2:
Bit1:
Bit0:
UNUSED. Read = 00000b, Write = don't care.
SFLE: Scratchpad FLASH Memory Access Enable.
When this bit is set, FLASH reads and writes from user software are directed to the 128-byte Scratch-
pad FLASH sector. When SFLE is set to logic 1, FLASH accesses out of the address range 0x00-
0x7F should not be attempted. Reads/Writes out of this range will yield unpredictable results.
0: FLASH access from user software directed to the 64k byte Program/Data FLASH sector.
1: FLASH access from user software directed to the 128 byte Scratchpad sector.
PSEE: Program Store Erase Enable.
Setting this bit allows an entire page of the FLASH program memory to be erased provided the
PSWE bit is also set. After setting this bit, a write to FLASH memory using the MOVX instruction
will erase the entire page that contains the location addressed by the MOVX instruction. The value of
the data byte written does not matter.
0: FLASH program memory erasure disabled.
1: FLASH program memory erasure enabled.
PSWE: Program Store Write Enable.
Setting this bit allows writing a byte of data to the FLASH program memory using the MOVX
instruction. The location must be erased before writing data.
0: Write to FLASH program memory disabled.
1: Write to FLASH program memory enabled.
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Rev. 1.4