C8051F02X Datasheet, PDF (6/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F020/1/2/3
18.3. SMBus Transfer Modes.................................................................................................187
18.3.1. Master Transmitter Mode ....................................................................................187
18.3.2. Master Receiver Mode.........................................................................................187
18.3.3. Slave Transmitter Mode.......................................................................................188
18.3.4. Slave Receiver Mode ...........................................................................................188
18.4. SMBus Special Function Registers ...............................................................................189
18.4.1. Control Register ...................................................................................................189
18.4.2. Clock Rate Register .............................................................................................192
18.4.3. Data Register........................................................................................................193
18.4.4. Address Register ..................................................................................................193
18.4.5. Status Register .....................................................................................................194
19. SERIAL PERIPHERAL INTERFACE BUS (SPI0) ........................................................197
19.1. Signal Descriptions........................................................................................................198
19.1.1. Master Out, Slave In (MOSI) ..............................................................................198
19.1.2. Master In, Slave Out (MISO) ..............................................................................198
19.1.3. Serial Clock (SCK) ..............................................................................................198
19.1.4. Slave Select (NSS)...............................................................................................198
19.2. SPI0 Operation ..............................................................................................................199
19.3. Serial Clock Timing ......................................................................................................200
19.4. SPI Special Function Registers .....................................................................................201
20. UART0 ..................................................................................................................................205
20.1.UART0 Operational Modes ..........................................................................................206
20.1.1. Mode 0: Synchronous Mode................................................................................206
20.1.2. Mode 1: 8-Bit UART, Variable Baud Rate .........................................................207
20.1.3. Mode 2: 9-Bit UART, Fixed Baud Rate ..............................................................208
20.1.4. Mode 3: 9-Bit UART, Variable Baud Rate .........................................................209
20.2. Multiprocessor Communications...................................................................................210
20.3. Frame and Transmission Error Detection......................................................................211
21. UART1 ..................................................................................................................................215
21.1.UART1 Operational Modes ..........................................................................................216
21.1.1. Mode 0: Synchronous Mode................................................................................216
21.1.2. Mode 1: 8-Bit UART, Variable Baud Rate .........................................................217
21.1.3. Mode 2: 9-Bit UART, Fixed Baud Rate ..............................................................218
21.1.4. Mode 3: 9-Bit UART, Variable Baud Rate .........................................................219
21.2. Multiprocessor Communications...................................................................................220
21.3. Frame and Transmission Error Detection......................................................................221
22. TIMERS................................................................................................................................225
22.1. Timer 0 and Timer 1......................................................................................................227
22.1.1. Mode 0: 13-bit Counter/Timer.............................................................................227
22.1.2. Mode 1: 16-bit Counter/Timer.............................................................................228
22.1.3. Mode 2: 8-bit Counter/Timer with Auto-Reload .................................................229
22.1.4. Mode 3: Two 8-bit Counter/Timers (Timer 0 Only) ...........................................230
22.2. Timer 2 .......................................................................................................................234
22.2.1. Mode 0: 16-bit Counter/Timer with Capture .......................................................235
22.2.2. Mode 1: 16-bit Counter/Timer with Auto-Reload ...............................................236
6
Rev. 1.4