C8051F02X Datasheet, PDF (112/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F020/1/2/3
Table 12.3. Special Function Registers
SFRs are listed in alphabetical order. All undefined SFR locations are reserved.
Register
Address Description
SPI0CFG
0x9A
SPI Configuration
SPI0CKR
0x9D
SPI Clock Rate Control
SPI0CN
0xF8
SPI Control
SPI0DAT
0x9B
SPI Data
T2CON
0xC8
Timer/Counter 2 Control
T4CON
0xC9
Timer/Counter 4 Control
TCON
0x88
Timer/Counter Control
TH0
0x8C
Timer/Counter 0 High
TH1
0x8D
Timer/Counter 1 High
TH2
0xCD
Timer/Counter 2 High
TH4
0xF5
Timer/Counter 4 High
TL0
0x8A
Timer/Counter 0 Low
TL1
0x8B
Timer/Counter 1 Low
TL2
0xCC
Timer/Counter 2 Low
TL4
0xF4
Timer/Counter 4 Low
TMOD
0x89
Timer/Counter Mode
TMR3CN
0x91
Timer 3 Control
TMR3H
0x95
Timer 3 High
TMR3L
0x94
Timer 3 Low
TMR3RLH
0x93
Timer 3 Reload High
TMR3RLL
0x92
Timer 3 Reload Low
WDTCN
0xFF
Watchdog Timer Control
XBR0
0xE1
Port I/O Crossbar Control 0
XBR1
0xE2
Port I/O Crossbar Control 1
XBR2
0xE3
Port I/O Crossbar Control 2
0x97, 0xA2, 0xB3, 0xB4,
0xCE, 0xDF
Reserved
* Refers to a register in the C8051F020/1 only.
** Refers to a register in the C8051F022/3 only.
† Refers to a register in the C8051F020/2 only.
†† Refers to a register in the C8051F021/3 only.
Page No.
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page 131
page 170
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Rev. 1.4