C8051F02X Datasheet, PDF (197/272 Pages) Silicon Laboratories – 8K ISP FLASH MCU Family

C8051F020/1/2/3
19. SERIAL PERIPHERAL INTERFACE BUS (SPI0)
The Serial Peripheral Interface (SPI0) provides access to a four-wire, full-duplex, serial bus. SPI0 may operate as a
master or a slave, and supports the connection of multiple slaves and masters on the same bus. A slave-select input
(NSS) is included in the SPI0 interface to select SPI0 as a slave; additional general purpose port I/O can be used as
slave-select outputs when SPI0 is operating as a master. Collision detection is provided when two or more masters
attempt a data transfer at the same time. When the SPI is configured as a master, the maximum data transfer rate (bits/
sec) is one-half the system clock frequency.
When the SPI is configured as a slave, the maximum data transfer rate (bits/sec) for full-duplex operation is 1/10 the
system clock frequency, provided that the master issues SCK, NSS, and the serial input data synchronously with the
system clock. If the master issues SCK, NSS, and the serial input data asynchronously, the maximum data transfer
rate (bits/sec) must be less that 1/10 the system clock frequency. In the special case where the master only wants to
transmit data to the slave and does not need to receive data from the slave (i.e. half-duplex operation), the SPI slave
can receive data at a maximum data transfer rate (bits/sec) of 1/4 the system clock frequency. This is provided that the
master issues SCK, NSS, and the serial input data synchronously with the system clock.
Figure 19.1. SPI Block Diagram
SFR Bus
SPI0CKR
SSSSSSSS
CCCCCCCC
RRRRRRRR
76543210
SPI0CFG
CCBBB F F F
KKCCCRRR
PP2 1 0SSS
HO
210
AL
SPI0CN
SWMR T S MS
PCOXX L SP
I ODOBV T I
F LFVSSEE
RYENN
NL
SYSCLK
Clock Divide
Logic
Bit Count
Logic
SPI CONTROL LOGIC
Data Path
Control
SPI Clock
(Master Mode)
Pin Control
Interface
SPI IRQ
SCK
C
Tx Data
MOSI ^R
O
SPI0DAT
Shift Register
76543210
Rx Data
Pin
Control
Logic
MISO
S
S
B
A
R
Receive Data Register
NSS
Write to
SPI0DAT
Read
SPI0DAT
SFR Bus
Rev. 1.4
Port I/O
197