MC68HC812A4 Datasheet, PDF (96/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Bus Control and Input/Output (I/O)
6.4.1 Port A Data Register
Address: $0000
Bit 7
6
5
4
3
2
Read:
PA7
PA6
PA5
PA4
PA3
PA2
Write:
Reset: 0
0
0
0
0
0
Expanded and peripheral: ADDR15 ADDR14 ADDR13 ADDR12 ADDR11 ADDR10
Figure 6-1. Port A Data Register (PORTA)
1
PA1
0
ADDR9
Bit 0
PA0
0
ADDR8
Read: Anytime, if register is in the map
Write: Anytime, if register is in the map
Bits PA7–PA0 are associated with addresses ADDR15–ADDR8
respectively. When this port is not used for external addresses such as
in single-chip mode, these pins can be used as general-purpose I/O.
DDRA determines the primary direction of each pin. This register is not
in the on-chip map in expanded and peripheral modes.
6.4.2 Port A Data Direction Register
Address: $0002
Bit 7
6
5
4
3
2
1
Read:
DDRA7 DDRA6 DDRA5 DDRA4 DDRA3 DDRA2 DDRA1
Write:
Reset: 0
0
0
0
0
0
0
Figure 6-2. Port A Data Direction Register (DDRA)
Bit 0
DDRA0
0
Read: Anytime, if register is in the map
Write: Anytime, if register is in the map
This register determines the primary direction for each port A pin when
functioning as a general-purpose I/O port. DDRA is not in the on-chip
map in expanded and peripheral modes.
1 = Associated pin is an output.
0 = Associated pin is a high-impedance input.
MC68HC812A4 — Rev. 3.0
96
Bus Control and Input/Output (I/O)
Advance Information
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