MC68HC812A4 Datasheet, PDF (111/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Advance Information — MC68HC812A4
Section 7. EEPROM
7.1 Contents
7.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .111
7.3 EEPROM Programmer’s Model . . . . . . . . . . . . . . . . . . . . . . .112
7.4 EEPROM Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . .114
7.4.1 EEPROM Module Configuration Register . . . . . . . . . . . . .114
7.4.2 EEPROM Block Protect Register . . . . . . . . . . . . . . . . . . . .115
7.4.3 EEPROM Test Register . . . . . . . . . . . . . . . . . . . . . . . . . . .116
7.4.4 EEPROM Programming Register . . . . . . . . . . . . . . . . . . . .117
7.2 Introduction
The MC68HC812A4 EEPROM (electrically erasable, programmable,
read-only memory) serves as a 4096-byte nonvolatile memory which
can be used for frequently accessed static data or as fast access
program code. Operating system kernels and standard subroutines
would benefit from this feature.
The MC68HC812A4 EEPROM is arranged in a 16-bit configuration. The
EEPROM array may be read as either bytes, aligned words, or
misaligned words. Access times are one bus cycle for byte and aligned
word access and two bus cycles for misaligned word operations.
Programming is by byte or aligned word. Attempts to program or erase
misaligned words will fail. Only the lower byte will be latched and
programmed or erased. Programming and erasing of the user EEPROM
can be done in all modes.
Advance Information
MOTOROLA
EEPROM
MC68HC812A4 — Rev. 3.0
111