MC68HC812A4 Datasheet, PDF (336/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Electrical Characteristics
18.15 SPI Timing
Num
Function^{(1), (2)}
Operating frequency
Master
Slave
SCK period
1
Master
Slave
Symbol
Min
f_op
DC
DC
t_sck
2
2
Max
1/2
1/2
256
—
Enable lead time
2
Master
Slave
t_Lead
1/2
—
1
—
Enable lag time
3
Master
Slave
t_Lag
1/2
—
1
—
Clock (SCK) high or low time
4
Master
Slave
t_wsck
t_cyc − 60
t_cyc − 30
128 t_cyc
—
Sequential transfer delay
5
Master
Slave
t_td
1/2
—
1
—
Data setup time (inputs)
6
Master
Slave
t_su
30
—
30
—
Data hold time (inputs)
7
Master
Slave
t_hi
0
—
30
—
8 Slave access time
9 Slave MISO disable time
Data valid (after SCK edge)
10 Master
Slave
t_a
—
1
t_dis
—
1
t_v
—
50
—
50
Data hold time (outputs)
11 Master
Slave
t_ho
0
—
0
—
Rise time
12 Input
Output
t_ri
—
t_cyc − 30
t_ro
—
30
Fall time
13 Input
Output
t_fi
—
t_cyc − 30
t_fo
—
30
1. V_DD = 5.0 Vdc ± 10%, V_SS = 0 Vdc, T_A = T_L to T_H, 200 pF load on all SPI pins
2. All AC timing is shown with respect to 20% V_DD and 70% V_DD levels, unless otherwise noted.
Unit
E-clock
frequency
t_cyc
t_sck
t_cyc
t_sck
t_cyc
ns
t_sck
t_cyc
ns
ns
t_cyc
t_cyc
ns
ns
ns
ns
ns
ns
MC68HC812A4 — Rev. 3.0
336
Electrical Characteristics
Advance Information
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