MC68HC812A4 Datasheet, PDF (104/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Bus Control and Input/Output (I/O)
6.4.11 Port E Assignment Register
Address: $000A
Bit 7
6
5
4
3
2
1
Bit 0
Read:
ARSIE PLLTE PIPOE NECLK LSTRE RDWE
0
0
Write:
Reset:
Special single-chip: 0
0
1
0
1
1
0
0
Special expanded narrow: 0
0
1
0
1
1
0
0
Peripheral: 0
1
0
1
0
0
0
0
Special expanded wide: 0
0
1
0
1
1
0
0
Normal single-chip 0
0
0
1
0
0
0
0
Normal expanded narrow: 0
0
0
0
0
0
0
0
Normal expanded wide: 0
0
0
0
0
0
0
0
Figure 6-11. Port E Assignment Register (PEAR)
Read: Anytime, if register is in the map
Write: Varies from bit to bit if register is in the map
The PEAR register selects between the general-purpose I/O functions
and the alternate bus-control functions of port E. The alternate
bus-control functions override the associated DDRE bits.
The reset condition of this register depends on the mode of operation.
• In normal single-chip mode, port E is general-purpose I/O.
• In special single-chip mode, the E-clock is enabled as a timing
reference, and the rest of port E is general-purpose I/O.
• In normal expanded modes, the E-clock is configured for its
alternate bus-control function, and the other bits of port E are
general-purpose I/O. The reset vector is located in external
memory and the E-clock may be required for this access. If R/W is
needed for external writable resources, PEAR can be written
during normal expanded modes.
• In special expanded modes, IPIPE1, IPIPE0, E, R/W, and LSTRB
are configured as bus-control signals.
MC68HC812A4 — Rev. 3.0
104
Bus Control and Input/Output (I/O)
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