MC68HC812A4 Datasheet, PDF (52/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Register Block
Addr.
$0080
Register Name
Timer IC/OC Select
Register (TIOS)
See page 186.
Timer Compare Force
$0081 Register (CFORC)
See page 187.
$0082
$0083
Timer Output
Compare 7 Mask
Register (OC7M)
See page 187.
Timer Output
Compare 7 Data
Register (OC7D)
See page 188.
Timer Counter Register
$0084
High (TCNTH)
See page 189.
Timer Counter Register
$0085
Low (TCNTL)
See page 189.
Timer System Control
$0086
Register (TSCR)
See page 190.
$0087
Reserved
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Bit 7
IOS7
0
FOC7
0
OC7M7
0
OC7D7
0
Bit 15
0
Bit 7
0
TEN
0
R
6
IOS6
0
FOC6
0
OC7M6
0
OC7D6
0
Bit 14
0
BIt 6
0
TSWAI
0
R
5
IOS5
0
FOC5
0
OC7M5
0
OC7D5
0
Bit 13
0
Bit 5
0
TSBCK
0
R
4
IOS4
0
FOC4
0
OC7M4
0
OC7D4
0
Bit 12
0
Bit 4
0
TFFCA
0
R
3
IOS3
0
FOC3
0
OC7M3
0
OC7D3
0
Bit 11
0
Bit 3
0
0
0
R
2
IOS2
0
FOC2
0
OC7M2
0
OC7D2
0
Bit 10
0
Bit 2
0
0
0
R
1
IOS1
0
FOC1
0
OC7M1
0
OC7D1
0
Bit 9
0
Bit 1
0
0
0
R
Bit 0
IOS0
0
FOC0
0
OC7M0
0
OC7D0
0
Bit 8
0
Bit 0
0
0
0
R
$0088
$0089
$008A
Timer Control ^Read: _OM7
OL7
OM6
Register 1 (TCTL1) Write:
See page 192. _{Reset: 0}
0
0
Timer Control ^Read: _OM3
OL3
OM2
Register 2 (TCTL2) Write:
See page 192. _{Reset: 0}
0
0
Timer Control
Register 3 (TCTL3)
See page 193.
Read:
Write:
Reset:
EDG7B
0
EDG7A
0
EDG6B
0
= Unimplemented
OL6
OM5
OL5
OM4
OL4
0
0
0
0
0
OL2
OM1
OL1
OM0
OL0
0
0
0
0
0
EDG6A EDG5B EDG5A EDG4B EDG4A
0
0
0
0
0
R = Reserved
U = Unaffected
Figure 2-1. Register Map (Sheet 9 of 15)
MC68HC812A4 — Rev. 3.0
52
Register Block
Advance Information
MOTOROLA