MC68HC812A4 Datasheet, PDF (234/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Serial Communications Interface Module (SCI)
When the transmit shift register is not transmitting a frame, the TXD pin
goes to the idle condition, logic 1. If at any time software clears the TE
bit in SCI control register 2 (SCCR2), the transmitter and receiver
relinquish control of the port I/O pins.
If software clears TE while a transmission is in progress (TC = 0), the
frame in the transmit shift register continues to shift out. Then the TXD
pin reverts to being a general-purpose I/O pin even if there is data
pending in the SCI data register. To avoid accidentally cutting off the last
frame in a message, always wait for TDRE to go high after the last frame
before clearing TE.
To separate messages with preambles with minimum idle line time, use
this sequence between messages:
1. Write the last byte of the first message to SCDRH/L.
2. Wait for the TDRE flag to go high, indicating the transfer of the last
frame to the transmit shift register.
3. Queue a preamble by clearing and then setting the TE bit.
4. Write the first byte of the second message to SCDRH/L.
When the SCI relinquishes the TXD pin, the PORTS and DDRS registers
control the TXD pin.
To force TXD high when turning off the transmitter, set bit 1 of the port S
register (PORTS) and bit 1 of the port S data direction register (DDRS).
The TXD pin goes high as soon as the SCI relinquishes it.
14.6.3.3 Break Characters
Writing a logic 1 to the send break bit, SBK, in SCI control register 2
(SCCR2) loads the transmit shift register with a break character. A break
character contains all logic 0s and has no start, stop, or parity bit. Break
character length depends on the M bit in SCI control register 1 (SCCR1).
As long as SBK is at logic 1, transmitter logic continuously loads break
characters into the transmit shift register. After software clears the SBK
bit, the shift register finishes transmitting the last break character and
then transmits at least one logic 1. The automatic logic 1 at the end of a
MC68HC812A4 — Rev. 3.0
234
Serial Communications Interface Module (SCI)
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