MC68HC812A4 Datasheet, PDF (64/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Central Processor Unit (CPU12)
I — Interrupt Mask Bit
Setting the I bit disables maskable interrupt sources.
N — Negative Flag
The N flag is set when the result of an operation is less than 0.
Z — Zero Flag
The Z flag is set when the result of an operation is all 0s.
V — Two’s Complement Overflow Flag
The V flag is set when a two’s complement overflow occurs.
C — Carry/Borrow Flag
The C flag is set when an addition or subtraction operation produces
a carry or borrow.
3.5 Data Types
The CPU12 supports four data types:
1. Bit data
2. 8-bit and 16-bit signed and unsigned integers
3. 16-bit unsigned fractions
4. 16-bit addresses
A byte is eight bits wide and can be accessed at any byte location. A
word is composed of two consecutive bytes with the most significant
byte at the lower value address. There are no special requirements for
alignment of instructions or operands.
MC68HC812A4 — Rev. 3.0
64
Central Processor Unit (CPU12)
Advance Information
MOTOROLA