MC68HC812A4 Datasheet, PDF (255/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Serial Communications Interface Module (SCI)
Register Descriptions and Reset Initialization
and then writing to the low byte of the SCI data register. TC clears
automatically when a break, preamble, or data is queued and ready
to be sent.
1 = Transmission complete
0 = Transmission in progress
RDRF — Receive Data Register Full Flag
RDRF is set when the data in the receive shift register transfers to the
SCI data register. Clear RDRF by reading SCI status register 1 with
RDRF set and then reading the low byte of the SCI data register.
1 = Receive data register full
0 = Data not available in SCI data register
IDLE — Idle Line Flag
IDLE is set when 10 consecutive logic 1s (if M = 0) or 11 consecutive
logic 1s (if M = 1) appear on the receiver input. Clear IDLE by reading
SCI status register 1 with IDLE set and then writing to the low byte of
the SCI data register. Once IDLE is cleared, a valid frame must again
set the RDRF flag before an idle condition can set the IDLE flag.
1 = Receiver input has become idle
0 = Receiver input is either active now or has never become active
since the IDLE flag was last cleared
NOTE: When the receiver wakeup bit (RWU) is set, an idle line condition does
not set the IDLE flag.
OR — Overrun Flag
OR is set when software fails to read the SCI data register before the
receive shift register receives the next frame. The data in the shift
register is lost, but the data already in the SCI data registers is not
affected. Clear OR by reading SCI status register 1 with OR set and
then reading the low byte of the SCI data register.
1 = Overrun
0 = No overrun
Advance Information
MOTOROLA
Serial Communications Interface Module (SCI)
MC68HC812A4 — Rev. 3.0
255