MC68HC812A4 Datasheet, PDF (63/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Central Processor Unit (CPU12)
CPU Registers
3.4.5 Program Counter
The program counter contains the address of the next instruction to be
executed.
The program counter can also serve as an index register in all indexed
addressing modes except autoincrement and autodecrement.
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Bit 0
SP15 SP14 SP13 SP12 SP11 SP10 SP9 SP8 SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0
Reset:
Unaffected by reset
Figure 3-8. Program Counter (PC)
3.4.6 Condition Code Register
Bit 7
6
5
4
3
2
1
Bit 0
S
X
H
I
N
Z
V
C
Reset:
U
1
U
1
U
U
U
U
U = Unaffected
Figure 3-9. Condition Code Register (CCR)
S — Stop Disable Bit
Setting the S bit disables the STOP instruction.
X — XIRQ Interrupt Mask Bit
Setting the X bit masks interrupt requests from the XIRQ pin.
H — Half-Carry Flag
The H flag is used only for BCD arithmetic operations. It is set when
an ABA, ADD, or ADC instruction produces a carry from bit 3 of
accumulator A. The DAA instruction uses the H flag and the C flag to
adjust the result to correct BCD format.
Advance Information
MOTOROLA
Central Processor Unit (CPU12)
MC68HC812A4 — Rev. 3.0
63