MC68HC812A4 Datasheet, PDF (220/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Multiple Serial Interface (MSI)
13.7.2 Port S Data Direction Register
Address: $00D7
Bit 7
6
5
4
3
2
1
Read:
DDRS7 DDRS6 DDRS5 DDRS4 DDRS3 DDRS2 DDRS1
Write:
Reset: 0
0
0
0
0
0
0
Figure 13-4. Port S Data Direction Register (DDRS)
Read: Anytime
Write: Anytime
Bit 0
DDRS0
0
DDRS7–DDRS0 — Port S Data Direction Bits
These bits control the data direction of each port S pin. Setting a
DDRS bit makes the pin an output; clearing a DDRS bit makes the pin
an input. Reset clears the port S data direction register, configuring all
port S pins as inputs.
1 = Corresponding port S pin configured as output
0 = Corresponding port S pin configured as input
NOTE: When the LOOPS bit is clear, the RX pins of SCI0 and SCI1 are inputs
and the TX pins are outputs regardless of their DDRS bits.
When the SPI is enabled, an SPI input pin is an input regardless of its
DDRS bit.
When the SPI is enabled, an SPI output is an output only if its DDRS bit
is set. When the DDRS bit of an SPI output is clear, the pin is available
for general-purpose I/O.
MC68HC812A4 — Rev. 3.0
220
Multiple Serial Interface (MSI)
Advance Information
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