MC68HC812A4 Datasheet, PDF (198/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Standard Timer Module
Read: Anytime
Write: Output compare channel, anytime; input capture channel, no
effect
When a channel is configured for input capture (IOSx = 0), the timer
channel registers latch the value of the free-running counter when a
defined transition occurs on the corresponding input capture pin.
When a channel is configured for output compare (IOSx = 1), the timer
channel registers contain the output compare value.
12.6.14 Pulse Accumulator Control Register
Address: $00A0
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
Write:
PAEN PAMOD PEDGE CLK1 CLK0 PAOVI PAI
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 12-21. Pulse Accumulator Control Register (PACTL)
Read: Anytime
Write: Anytime
PAEN — Pulse Accumulator Enable Bit
PAEN enables the pulse accumulator.
1 = Pulse accumulator enabled
0 = Pulse accumulator disabled
NOTE: The pulse accumulator can operate even when the timer enable bit,
TEN, is clear.
PAMOD — Pulse Accumulator Mode Bit
PAMOD selects event counter mode or gated time accumulation
mode.
1 = Gated time accumulation mode
0 = Event counter mode
MC68HC812A4 — Rev. 3.0
198
Standard Timer Module
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