MC68HC812A4 Datasheet, PDF (334/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Electrical Characteristics
18.14 Non-Multiplexed Expansion Bus Timing
Num
Characteristic^{(1), (2)}
Delay Symbol
Frequency of operation (E-clock frequency)
—
f_o
1 Cycle time
t_cyc = 1/f_o
t_cyc
2 Pulse width, E low
PW_EL = t_cyc/2 + delay
−2
PW_EL
3 Pulse width, E high⁽³⁾
PW_EH = t_cyc/2 + delay
−2
PW_EH
5 Address delay time
t_AD = t_cyc/4 + delay
29
t_AD
6 Address hold time
—
t_AH
7 Address valid time to E rise
t_AV = PW_EL−t_AD
—
t_AV
11 Read data setup time
—
t_DSR
12 Read data hold time
—
t_DHR
13 Write data delay time
t_DDW = t_cyc/4 + delay
25
t_DDW
14 Write data hold time
—
t_DHW
15 Write data setup time⁽³⁾
t_DSW = PW_EH−t_DDW
—
t_DSW
16 Read/write delay timw
t_RWD = t_cyc/4 + delay
18
t_RWD
17 Read/write valid time to E rise
t_RWV = PW_EL−t_RWD
—
t_RWV
18 Read/write hold time
—
t_RWH
19 Low strobe delay time
t_LSD = t_cyc/4 + delay
18
t_LSD
20 Low strobe valid time to E rise
t_LSV = PW_EL−t_LSD
—
t_LSV
21 Low strobe hold time
—
t_LSH
22 Address access time⁽³⁾
t_ACCA = t_cyc−t_AD−t_DSR
—
t_ACCA
23 Access time from E rise⁽³⁾
t_ACCE = PW_EH−t_DSR
—
t_ACCE
26 Chip-select delay time
t_CSD = t_cyc/4 + delay
29
t_CSD
27 Chip-select access time⁽³⁾
t_ACCS = t_cyc−t_CSD−t_DSR
—
t_ACCS
28 Chip-select hold time
29 Chip-select negated time
—
t_CSN = t_cyc/4 + delay
5
t_CSH
t_CSN
1. V_DD = 5.0 Vdc ± 10%, V_SS = 0 Vdc, T_A = T_L to T_H, unless otherwise noted
2. All timings are calculated for normal port drives.
3. This characteristic is affected by clock stretch.
Add N × t_cyc where N = 0, 1, 2, or 3, depending on the number of clock stretches.
5 MHz
Min Max
dc 8.0
125 —
60
—
60
—
—
60
20
—
0
—
30
—
0
—
—
46
20
—
30
—
—
49
20
—
20
—
—
49
11
—
20
—
—
35
—
30
—
60
—
65
0
10
36
—
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MC68HC812A4 — Rev. 3.0
334
Electrical Characteristics
Advance Information
MOTOROLA