MC68HC812A4 Datasheet, PDF (292/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Analog-to-Digital Converter (ATD)
16.7.3 ATD Control Register 2
Address: $0062
Bit 7
6
5
4
3
2
1
Read:
0
0
0
ADPU AFFC AWAI
ASCIE
Write:
Reset: 0
0
0
0
0
0
0
= Unimplemented
Figure 16-5. ATD Control Register 2 (ATDCTL2)
Read: Anytime
Write: Anytime except ASCIF flag, which is read-only
Bit 0
ASCIF
0
NOTE: Writing to this register aborts the current conversion sequence.
ADPU — ATD Powerup Bit
ADPU enables the clock signal to the ATD and powers up its analog
circuits.
1 = ATD enabled
0 = ATD disabled
NOTE: After ADPU is set, the ATD requires an analog circuit stabilization
period.
AFFC — ATD Fast Flag Clear Bit
When AFFC is set, writing to a result register (ADR0H–ADR7H)
clears the associated CCF flag if it is set. When AFFC is clear,
clearing a CCF flag requires a read of the status register followed by
a read of the result register.
1 = Fast CCF clearing enabled
0 = Fast CCF clearing disabled
AWAI — ATD Stop in Wait Mode Bit
ASWAI disables the ATD in wait mode for lower power consumption.
1 = ATD disabled in wait mode
0 = ATD enabled in wait mode
MC68HC812A4 — Rev. 3.0
292
Analog-to-Digital Converter (ATD)
Advance Information
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