MC68HC812A4 Datasheet, PDF (105/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Bus Control and Input/Output (I/O)
Registers
In peripheral mode, the PEAR register is not accessible for reads or
writes. However, the PLLTE control bit is cleared to configure PE6 as a
test output from the PLL module.
ARSIE — Auxiliary Reset Input Enable Bit
Write anytime.
1 = PE7 is a high-true reset input; reset timing is the same as that
of the low-true RESET pin.
0 = PE7 is general-purpose I/O.
PLLTE — PLL Testing Enable Bit
Normal modes: Write never
Special modes: Write anytime except the first time
1 = PE6 is a test signal output from the PLL module (no effect in
single-chip or normal expanded modes); PIPOE = 1 overrides
this function and forces PE6 to be a pipe status output signal.
0 = PE6 is general-purpose I/O or pipe output.
PIPOE — Pipe Status Signal Output Enable Bit
Normal modes: Write once
Special modes: Write anytime except the first time
1 = PE6 and PE5 are outputs and indicate the state of the
instruction queue; no effect in single-chip modes.
0 = PE6 and PE5 are general-purpose I/O; if PLLTE = 1, PE6 is a
test output signal from the PLL module.
NECLK — No External E Clock Bit
Normal modes: Write anytime
Special modes: Write never
In peripheral mode, E is an input; in all other modes, E is an output.
1 = PE4 is a general-purpose I/O pin.
0 = PE4 is the external E-clock pin. To get a free-running E-clock
in single-chip modes, use NECLK = 0 and IVIS = 1. A 16-bit
write to PEAR:MODE can configure these bits in one
operation.
Advance Information
MOTOROLA
Bus Control and Input/Output (I/O)
MC68HC812A4 — Rev. 3.0
105