MC68HC812A4 Datasheet, PDF (312/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

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The host controller must wait 150 cycles for a non-intrusive BDM
command to execute before another command can be sent. This delay
includes 128 cycles for the maximum delay for a dead cycle. For data
read commands, the host must insert this delay between sending the
address and attempting to read the data.
BDM logic retains control of the internal buses until a read or write is
completed. If an operation can be completed in a single cycle, it does not
intrude on normal CPU operation. However, if an operation requires
multiple cycles, CPU clocks are frozen until the operation is complete.
The CPU must be in background mode to execute commands that are
implemented in the BDM ROM. The BDM ROM is located at $FF20 to
$FFFF while BDM is active. There are also seven bytes of BDM registers
which are located at $FF00 to $FF06 while BDM is active. The CPU
executes code from this ROM to perform the requested operation. These
commands are shown in Table 17-2 and Table 17-3.
Table 17-2. BDM Commands Implemented in Hardware
Command
BACKGROUND
READ_BD_BYTE
STATUS⁽¹⁾
READ_BD_WORD
READ_BYTE
READ_WORD
WRITE_BD_BYTE
Opcode (Hex)
Data
Description
90
None
Enter background mode, if firmware is enabled.
E4
16-bit address
16-bit data out
Read from memory with BDM in map (may steal
cycles if external access); data for odd address on
low byte, data for even address on high byte
FF01,
READ_BD_BYTE $FF01. Running user code; BGND
0000 0000 (out) instruction is not allowed
E4
FF01,
READ_BD_BYTE $FF01. BGND instruction is
1000 0000 (out) allowed.
FF01,
READ_BD_BYTE $FF01. Background mode active,
1100 0000 (out) waiting for single wire serial command
EC
16-bit address Read from memory with BDM in map (may steal
16-bit data out cycles if external access); must be aligned access
E0
16-bit address
16-bit data out
Read from memory with BDM out of map (may steal
cycles if external access); data for odd address on
low byte, data for even address on high byte
E8
16-bit address Read from memory with BDM out of map (may steal
16-bit data out cycles if external access); must be aligned access
C4
16-bit address
16-bit data in
Write to memory with BDM in map (may steal cycles
if external access); data for odd address on low byte,
data for even address on high byte
MC68HC812A4 — Rev. 3.0
312
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