MC68HC812A4 Datasheet, PDF (34/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

General Description
Table 1-2. Pin Descriptions
Pin
Port
Description
V_DD, V_SS
— _{Operating voltage and ground for the MCU}⁽¹⁾
V_RH, V_RL
— Reference voltages for the ADC
AV_DD, AV_SS
— _{Operating voltage and ground for the ADC}⁽²⁾
V_DDPLL, V_SSPLL
— Power and ground for PLL clock control
V_STBY
Port AD RAM standby power input
XTAL, EXTAL
— _{Input pins for either a crystal or a CMOS compatible clock}⁽³⁾
XIRQ
PE0 Asynchronous, non-maskable external interrupt request input
IRQ
PE1
Asynchronous, maskable external interrupt request input with selectable
falling-edge triggering or low-level triggering
R/W
PE2
Expansion bus data direction indicator
General-purpose I/O; read/write in expanded modes
LSTRB
PE3 ^{Low byte strobe (0 = low byte valid)(4)}
General-purpose I/O
ECLK
PE4
Timing reference output for external bus clock (normally, half the crystal frequency)
General-purpose I/O
BKGD
— Mode-select pin determines initial operating mode of the MCU after reset
MODA
PE5 _{Mode-select input determines initial operating mode of the MCU after reset}⁽⁵⁾
MODB
PE6 _{Mode-select input determines initial operating mode of the MCU after reset}⁽⁵⁾
IPIPE0
IPIPE1
PE5
Instruction queue tracking signals for development systems
PE6
ARST
PE7
Alternate active-high reset input
General-purpose I/O
XFC
— Loop filter pin for controlled damping of PLL VCO loop
RESET
—
Active-low bidirectional control signal; input initializes MCU to known startup state;
output when COP or clock monitor causes a reset
ADDR15–ADDR8
ADDR7–ADDR0
DATA15–DATA8
DATA7–DATA0
Port A
Port B ^{Single-chip modes: general-purpose I/O}
Expanded modes: external bus pins
Port C _{Port D in narrow data bus mode: general-purpose I/O or key wakeup port}
Port D
MC68HC812A4 — Rev. 3.0
34
General Description
Advance Information
MOTOROLA