MC68HC812A4 Datasheet, PDF (273/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Serial Peripheral Interface (SPI)
SPI Register Descriptions and Reset Initialization
15.7 SPI Register Descriptions and Reset Initialization
This section describes the SPI registers and reset initialization.
15.7.1 SPI Control Register 1
Address: $00D0
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SPIE
Write:
SPE SWOM MSTR CPOL CPHA SSOE LSBF
Reset: 0
0
0
0
0
1
0
0
Figure 15-9. SPI Control Register 1 (SP0CR1)
Read: Anytime
Write: Anytime
SPIE — SPI Interrupt Enable Bit
SPIE enables the SPIF and MODF flags to generate interrupt
requests.
1 = SPIF and MODF interrupt requests enabled
0 = SPIF and MODF interrupt requests disabled
SPE — SPI Enable Bit
Setting the SPE bit enables the SPI and configures port S pins 7–4 for
SPI functions. Clearing SPE puts the SPI in a disabled, low-power
state.
1 = SPI enabled
0 = SPI disabled
NOTE: When the MODF flag is set, SPE always reads as logic 0. Writing to SPI
control register 1 is part of the mode fault recovery sequence.
SWOM — Port S Wired-OR Mode Bit
SWOM disables the pullup devices on port S pins 7–4 so that they
become open-drain outputs.
1 = Open-drain port S pin 7–4 outputs
0 = Normal push-pull port S pin 7–4 outputs
Advance Information
MOTOROLA
Serial Peripheral Interface (SPI)
MC68HC812A4 — Rev. 3.0
273