MC68HC812A4 Datasheet, PDF (48/342 Pages) Motorola, Inc – 16-bit device composed of standard on-chip peripheral modules connected by an intermodule bus. Modules include

Register Block
Addr.
$0032
Register Name
Port F Data Direction
Register (DDRF)
See page 131.
Port G Data Direction
$0033
Register (DDRG)
See page 131.
$0034
Data Page Register
(DPAGE)
See page 132.
Program Page Register
$0035
(PPAGE)
See page 132.
$0036
Extra Page Register
(EPAGE)
See page 133.
$0037
Window Definition
Register (WINDEF)
See page 133.
Memory Expansion
$0038 Assignment Register
(MXAR) See page 134.
$0039
Reserved
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Bit 7
0
0
0
0
PD19
0
PPA21
0
PEA17
0
DWEN
0
0
0
R
6
5
4
3
2
1
Bit 0
DDRF6 DDRF5 DDRF4 DDRF3 DDRF2 DDRF1 DDRF0
0
0
0
0
0
0
0
0
DDRG5 DDRG4 DDRG3 DDRG2 DDRG1 DDRG0
0
0
0
0
0
0
0
PD18 PD17 PD16 PD15 PD14 PD13 PD12
0
0
0
0
0
0
0
PPA20 PPA19 PPA18 PPA17 PPA16 PPA15 PPA14
0
0
0
0
0
0
0
PEA16 PEA15 PEA14 PEA13 PEA12 PEA11 PEA10
0
0
0
0
0
0
0
PWEN EWEN
0
0
0
0
0
0
0
0
0
0
0
0
0
A21E A20E A19E A18E A17E A16E
0
0
0
0
0
0
0
R
R
R
R
R
R
R
$003A
Reserved
R
R
R
R
R
R
R
R
$003B
Reserved
R
R
R
R
R
R
R
R
Chip-Select Control ^{Read: 0}
$003C Register 0 (CSCTL0) Write:
See page 136. _{Reset: 0}
CSP1E CSP0E
0
0
CSDE
0
CS3E
0
CS2E
0
CS1E
0
CS0E
0
Chip-Select Control ^{Read: 0}
CSP1FL CSPA21 CSDHF CS3EP
0
0
0
$003D Register 1 (CSCTL1) Write:
See page 138. _{Reset: 0}
0
0
0
0
0
0
0
Chip-Select Stretch ^{Read: 0}
$003E Register 0 (CSSTR0) Write:
See page 139. _{Reset: 0}
0
SRP1A SRP1B SRP0A SRP0B STRDA STRDB
0
1
1
1
1
1
1
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-1. Register Map (Sheet 5 of 15)
MC68HC812A4 — Rev. 3.0
48
Register Block
Advance Information
MOTOROLA